Principal Systems Engineer

The Skyworks, MSS-Timing Systems Engineering Team is an elite group of system design engineers skilled in high speed PCB designs, Multi-chip-module designs (both designs need expertise in signal integrity analysis and design, use of PCB design tools, thermal modelling) , digital design (FPGA design, verification of mixed signal ICs), mixed-signal circuit analysis and modelling. The systems engineering team provides system and application level expertise to the IC design, software, firmware, validation and application engineering teams. System design engineers have a deep understanding of all aspects of timing system development including product definition, platform design and validation planning.

Skyworks has a broad portfolio of Timing products ranging from clock generators, network synchronization, jitter attenuators, oscillators and buffers. We are the dominant Timing supplier in a high-performance communications timing market thanks to our leading technologies. Our products heavily leverage digital technology, and are very flexible and versatile in nature. The combination of high performance and high programmability has led to many product opportunities without the high cost of new silicon development. This position has direct influence in creating the infrastructure software and modelling tools needed to enable optimizing the circuit parameters in our high-performance clocks products. Deep understanding of RF circuit concepts such as crosstalk, in-band and out-of-band noise modelling , phase noise along with very good programming skills define this unique role. You will be responsible for modelling challenging mixed-signal circuits and designing algorithms extract the best performance out of these circuits.

If you are a highly motivated engineer who is passionate about electrical engineering and are eager to learn about and help build circuit systems that keep the world in sync, we'd love to talk to you.

* Develop modelling/optimization programs in Python to maximize performance of our high-performance clock products.

* Create algorithms and collaborate with FW team to integrate these programs with the on-chip FW.

* Collaborate with the design team to develop validation tests for silicon under development

* Work with our software team, architect and design optimal interfaces for application software to access modelling / optimization programs

* MSEE with 8 years of relevant experience or BSEE with 12 years of relevant experience.

* Good understanding of phase locked loops, control theory and EM theory; Knowledge in communication theory, RF design and signal processing.

* Possess at least two of the following four major areas of core competencies

a. Experience with chip definition, verification and development in the PLL and/or mixed products.

b. Experience in developing sophisticated test methods with lab equipment such as spectrum analyzer, phase noise analyzer, oscilloscope, signal generator etc.

c. Experience with high speed PCB design and using industry leading EDA tools for PCB design, tools (experience with orCAD / Altium preferred)

d. FPGA development experience

* Experience with software application development for engineering analysis / design using Python/VB

* Knowledge of Verilog and Verilog-AMS is a plus.

* Excellent communication skills.

* Results oriented and practical minded.