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SERDES Validation Director

Marvell Semiconductor, Inc.
paid time off, flex time, 401(k)
United States, California, Santa Clara
5488 Marvell Lane (Show on map)
Sep 19, 2025

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

The Marvell post silicon validation group designs and develops test platforms for validating enterprise, cloud, AI, storage, and carrier architectures including multi-core Arm-based Network processors. The electrical characterization team is a post silicon validation sub-group focused on the debug and characterization of SerDes and DDR interfaces on the processor. The SerDes interface use NRZ and PAM4 signaling for Ethernet, CPRI, JESD, and PCIe interfaces. DRAM interfaces include LPDDR5, DDR4/5 memory modules.
Characterization engineers are responsible for developing test platforms used and automated test suites to characterize the analog interfaces over process voltage and temperature (PVT) extremes to determine silicon viability for volume production.

What You Can Expect

  • Own the electrical characterization/compliance of SERDES IP for PCIe, Networking (Ethernet) and DDR. Develop and implement test plans for SERDES and DDR characterization.

  • Develop methods for automated electrical characterization (validation) of the interfaces. Develop standard test methods and regression tests for the validation of the IPs.

  • Lead and manage the SERDES validation and applications engineering teams for the BU. Provide applications engineering support to major customers.

  • Plan equipment (CAPEX) and resource needs for supporting the BU products.

  • Responsible for leading and building a strong team of talented engineers for SERDES device validation and SERDES IP characterization.

  • Responsible for the development and implementation of the characterization and support strategy for the SERDES IP included in almost all products of the Business Group

  • Develop the technical skillset in the team to handle complex SERDES debugging issues.

  • Represent Marvell's interest at the standards committees and be an active contributor on these committees. Ensure that our planning for future SERDES IP is well addressed from an equipment and training perspective.

  • Support high-speed board design, debug and board extraction, definition and characterization for the SERDES devices as well as collaborate with the internal tools engineering team to design the test infrastructure.

  • Must have proven ability to work with executive management to develop and implement long term solutions impacting the success of the business group.

What We're Looking For

Marvell is seeking an experienced Technical Director / Senior Principal SERDES signal integrity engineer to lead the validation and applications engineering team for SERDES IP in the Custom Compute and Storage Business Group.

  • MSEE degree with 10+ years or Ph.D. in MSEE with 5+ years of direct experience in SERDES characterization and design.

  • The ideal candidate should have a strong background in characterization and design of SERDES IP with special consideration for direct experience in the processors industry

  • Prior experience on PCIe Gen6 and Ethernet 224G is desired. The knowledge of DDR is a definite plus

  • The candidate should have in depth knowledge of the SERDES architecture and measurement methods, especially for PCIe and Ethernet interfaces.
  • The candidate must have in depth knowledge of the instrumentation necessary for testing the SERDES IP and a strong commitment to ensuring characterization of such IP for extremely high-volume production.

  • In depth working knowledge of test equipment used for SERDES characterization (Scope, BERT, Network analyzer etc.).
  • 3-5 years prior management experience with leading a team of talented engineers

  • Experience in software programming languages development ex. Python, etc. as well as mathematical programing such as Matlab

  • Proven experience on product development cycle from conception to production

  • Critical thinking and problem-solving attitude and ownership of the group's results.

  • Knowledge in SERDES modeling techniques

  • Excellent verbal and written communication skills.

Expected Base Pay Range (USD)

176,130 - 263,900, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.

Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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